Data communication systems have been under continual development for many years. Two such communication systems exist; they are a communication system that employs turbo codes and a communication system that employs LDPC (Low Density Parity Check) codes. Each of these different types of communication systems is able to achieve reliable communication with very low BERs (Bit Error Rates). Lowering the required signal to noise ratio for reliable error free communication is of great significance in communication systems. Ideally, the goal is to try to reach Shannon's limit in a communication channel. Shannon's limit can be viewed as the data rate used in a communication channel with a particular SNR (Signal to Noise Ratio) that achieves error free transmission through the communication channel. In other words, the Shannon's limit is the theoretical bound for channel capacity for a given modulation and channel. LDPC code has been shown to provide an excellent decoding performance that can approach the Shannon's limit in some cases. For example, some LDPC codes have been shown to come within 0.0045 dB (decibels) of Shannon's limit for an AWGN (Additive White Gaussian Noise) channel.
LDPC decoders have traditionally been designed for a specific parity check matrix, i.e. H. Thus, the block length that the decoder processes and the rate of the code are fixed for a particular architecture. A need therefore exists for improved LDPC decoders that can support a plurality of code block lengths and code rates. A further need exists for a LDPC decoder that has improved architecture for hardware implementation to achieve higher throughput, lower power consumption, and decreased chip area.